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Aliases:

None

Technical Challenge:

The portable electronics market (pagers, cell phones, I-Pods, etc.) demands high density, high performance, and low profile systems. This means these devices must have stringent packaging requirements in terms of their electrical (low resistance, low cross-talk, and high frequency operation) and physical (thickness, conformability, and linewidth density) characteristics. The integrated circuit industry needs to improve the density of interconnect technologies to keep pace with the advances in semiconductor device fabrication. The number of I/O connections on a chip increases while the wiring density of the system level interconnect is increasing at a much more slow pace. This problem is particularly acute for high performance mixed-signal systems.

Description:

This technology overcomes the technical challenge by combining semiconductor processes with high temperature with releasable bonding techniques to enable fabrication of very high-density, double-sided, multilayered circuits. The superior electrical and physical characteristics of these circuits address the severe constraints of portable electronic devices.

Demonstration Capability:

A demonstration is not available.

Potential Commercial Application(s):

This technology can be used in commercial applications for the production of miniaturized products for communications, entertainment, and surveillance.

Patent Status:

A patent application has been filed with USPTO.

Reference Number: 1296

If you are interested in exploring this technology further, please call 443-445-7159 or express your interest in writing to the:

National Security Agency
NSA Technology Transfer Program
9800 Savage Road, Suite 6541
Fort George G. Meade, Maryland 20755-6541